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array architecture造句

"array architecture"是什么意思   

例句與造句

  1. Improve on algorithms can enhance encoding / decoding performance . with pipeline and systolic array architectures adopted in the hardware implements , encoder / decoder based on fpga can work better
    對(duì)編譯碼算法的改進(jìn)有助于提高rs編譯碼器的性能,而利用fpga來(lái)實(shí)現(xiàn)rs編譯碼器,并采用流水線、心縮式陣列等優(yōu)化結(jié)構(gòu),更能提高編譯碼器的性能。
  2. Redundant disk arrays are a popular method to improve the reliability and performance of disk storage and an ever - increasing number of array architectures and data layouts are being proposed to balance cost , performance , and reliability
    冗余磁盤陣列作為一種提高存儲(chǔ)系統(tǒng)可靠性和性能的技術(shù),已經(jīng)得到了廣泛的應(yīng)用。有關(guān)磁盤陣列結(jié)構(gòu)和數(shù)據(jù)布局的研究也一直比較活躍。
  3. First , the low testing power dft solution - - scan array architecture are presented . in the scan array , the inserted wrapper and paralleled leaf scan chain reduce the testing power as low as the power dissipation in the normal working mode
    首先,從優(yōu)化測(cè)試功耗的角度出發(fā)提出了掃描陣列結(jié)構(gòu),通過(guò)加入wrapper測(cè)試控制結(jié)構(gòu)以及構(gòu)建并行化的分支掃描鏈,有效地將測(cè)試功耗降低到與正常工作功耗相當(dāng)?shù)牧考?jí)。
  4. A novel flash memory , which uses the source induced band - to - band tunneling hot electron ( sibe ) injection to perform programming , and a pmos selected divided bit - line nor ( pnor ) array architecture are originally introduced in this dissertation
    本論文首次提出了一種采用源極誘導(dǎo)帶帶隧穿熱電子注入( sourceinducedband - to - bandtunnelinghotelectroninjection )進(jìn)行編程操作的新型快閃存儲(chǔ)器技術(shù)和一種pmos選擇分裂位線nor ( pmosselecteddividedbit - linenor )快閃存貯陣列結(jié)構(gòu)。
  5. It's difficult to find array architecture in a sentence. 用array architecture造句挺難的

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